\doxysection{mpu\+\_\+armv8.\+h}
\hypertarget{mpu__armv8_8h_source}{}\label{mpu__armv8_8h_source}\index{C:/Users/ASUS/Desktop/dm-\/ctrlH7-\/balance-\/9025test/Drivers/CMSIS/Include/mpu\_armv8.h@{C:/Users/ASUS/Desktop/dm-\/ctrlH7-\/balance-\/9025test/Drivers/CMSIS/Include/mpu\_armv8.h}}

\begin{DoxyCode}{0}
\DoxyCodeLine{00001\ \textcolor{comment}{/******************************************************************************}}
\DoxyCodeLine{00002\ \textcolor{comment}{\ *\ @file\ \ \ \ \ mpu\_armv8.h}}
\DoxyCodeLine{00003\ \textcolor{comment}{\ *\ @brief\ \ \ \ CMSIS\ MPU\ API\ for\ Armv8-\/M\ and\ Armv8.1-\/M\ MPU}}
\DoxyCodeLine{00004\ \textcolor{comment}{\ *\ @version\ \ V5.1.0}}
\DoxyCodeLine{00005\ \textcolor{comment}{\ *\ @date\ \ \ \ \ 08.\ March\ 2019}}
\DoxyCodeLine{00006\ \textcolor{comment}{\ ******************************************************************************/}}
\DoxyCodeLine{00007\ \textcolor{comment}{/*}}
\DoxyCodeLine{00008\ \textcolor{comment}{\ *\ Copyright\ (c)\ 2017-\/2019\ Arm\ Limited.\ All\ rights\ reserved.}}
\DoxyCodeLine{00009\ \textcolor{comment}{\ *}}
\DoxyCodeLine{00010\ \textcolor{comment}{\ *\ SPDX-\/License-\/Identifier:\ Apache-\/2.0}}
\DoxyCodeLine{00011\ \textcolor{comment}{\ *}}
\DoxyCodeLine{00012\ \textcolor{comment}{\ *\ Licensed\ under\ the\ Apache\ License,\ Version\ 2.0\ (the\ License);\ you\ may}}
\DoxyCodeLine{00013\ \textcolor{comment}{\ *\ not\ use\ this\ file\ except\ in\ compliance\ with\ the\ License.}}
\DoxyCodeLine{00014\ \textcolor{comment}{\ *\ You\ may\ obtain\ a\ copy\ of\ the\ License\ at}}
\DoxyCodeLine{00015\ \textcolor{comment}{\ *}}
\DoxyCodeLine{00016\ \textcolor{comment}{\ *\ www.apache.org/licenses/LICENSE-\/2.0}}
\DoxyCodeLine{00017\ \textcolor{comment}{\ *}}
\DoxyCodeLine{00018\ \textcolor{comment}{\ *\ Unless\ required\ by\ applicable\ law\ or\ agreed\ to\ in\ writing,\ software}}
\DoxyCodeLine{00019\ \textcolor{comment}{\ *\ distributed\ under\ the\ License\ is\ distributed\ on\ an\ AS\ IS\ BASIS,\ WITHOUT}}
\DoxyCodeLine{00020\ \textcolor{comment}{\ *\ WARRANTIES\ OR\ CONDITIONS\ OF\ ANY\ KIND,\ either\ express\ or\ implied.}}
\DoxyCodeLine{00021\ \textcolor{comment}{\ *\ See\ the\ License\ for\ the\ specific\ language\ governing\ permissions\ and}}
\DoxyCodeLine{00022\ \textcolor{comment}{\ *\ limitations\ under\ the\ License.}}
\DoxyCodeLine{00023\ \textcolor{comment}{\ */}}
\DoxyCodeLine{00024\ }
\DoxyCodeLine{00025\ \textcolor{preprocessor}{\#if\ \ \ defined\ (\ \_\_ICCARM\_\_\ )}}
\DoxyCodeLine{00026\ \textcolor{preprocessor}{\ \ \#pragma\ system\_include\ \ \ \ \ \ \ \ \ }\textcolor{comment}{/*\ treat\ file\ as\ system\ include\ file\ for\ MISRA\ check\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{00027\ \textcolor{preprocessor}{\#elif\ defined\ (\_\_clang\_\_)}}
\DoxyCodeLine{00028\ \textcolor{preprocessor}{\ \ \#pragma\ clang\ system\_header\ \ \ \ }\textcolor{comment}{/*\ treat\ file\ as\ system\ include\ file\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{00029\ \textcolor{preprocessor}{\#endif}}
\DoxyCodeLine{00030\ }
\DoxyCodeLine{00031\ \textcolor{preprocessor}{\#ifndef\ ARM\_MPU\_ARMV8\_H}}
\DoxyCodeLine{00032\ \textcolor{preprocessor}{\#define\ ARM\_MPU\_ARMV8\_H}}
\DoxyCodeLine{00033\ }
\DoxyCodeLine{00035\ \textcolor{preprocessor}{\#define\ ARM\_MPU\_ATTR\_DEVICE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (\ 0U\ )}}
\DoxyCodeLine{00036\ }
\DoxyCodeLine{00038\ \textcolor{preprocessor}{\#define\ ARM\_MPU\_ATTR\_NON\_CACHEABLE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (\ 4U\ )}}
\DoxyCodeLine{00039\ }
\DoxyCodeLine{00046\ \textcolor{preprocessor}{\#define\ ARM\_MPU\_ATTR\_MEMORY\_(NT,\ WB,\ RA,\ WA)\ \(\backslash\)}}
\DoxyCodeLine{00047\ \textcolor{preprocessor}{\ \ (((NT\ \&\ 1U)\ <<\ 3U)\ |\ ((WB\ \&\ 1U)\ <<\ 2U)\ |\ ((RA\ \&\ 1U)\ <<\ 1U)\ |\ (WA\ \&\ 1U))}}
\DoxyCodeLine{00048\ }
\DoxyCodeLine{00050\ \textcolor{preprocessor}{\#define\ ARM\_MPU\_ATTR\_DEVICE\_nGnRnE\ (0U)}}
\DoxyCodeLine{00051\ }
\DoxyCodeLine{00053\ \textcolor{preprocessor}{\#define\ ARM\_MPU\_ATTR\_DEVICE\_nGnRE\ \ (1U)}}
\DoxyCodeLine{00054\ }
\DoxyCodeLine{00056\ \textcolor{preprocessor}{\#define\ ARM\_MPU\_ATTR\_DEVICE\_nGRE\ \ \ (2U)}}
\DoxyCodeLine{00057\ }
\DoxyCodeLine{00059\ \textcolor{preprocessor}{\#define\ ARM\_MPU\_ATTR\_DEVICE\_GRE\ \ \ \ (3U)}}
\DoxyCodeLine{00060\ }
\DoxyCodeLine{00065\ \textcolor{preprocessor}{\#define\ ARM\_MPU\_ATTR(O,\ I)\ (((O\ \&\ 0xFU)\ <<\ 4U)\ |\ (((O\ \&\ 0xFU)\ !=\ 0U)\ ?\ (I\ \&\ 0xFU)\ :\ ((I\ \&\ 0x3U)\ <<\ 2U)))}}
\DoxyCodeLine{00066\ }
\DoxyCodeLine{00068\ \textcolor{preprocessor}{\#define\ ARM\_MPU\_SH\_NON\ \ \ (0U)}}
\DoxyCodeLine{00069\ }
\DoxyCodeLine{00071\ \textcolor{preprocessor}{\#define\ ARM\_MPU\_SH\_OUTER\ (2U)}}
\DoxyCodeLine{00072\ }
\DoxyCodeLine{00074\ \textcolor{preprocessor}{\#define\ ARM\_MPU\_SH\_INNER\ (3U)}}
\DoxyCodeLine{00075\ }
\DoxyCodeLine{00080\ \textcolor{preprocessor}{\#define\ ARM\_MPU\_AP\_(RO,\ NP)\ (((RO\ \&\ 1U)\ <<\ 1U)\ |\ (NP\ \&\ 1U))}}
\DoxyCodeLine{00081\ }
\DoxyCodeLine{00089\ \textcolor{preprocessor}{\#define\ ARM\_MPU\_RBAR(BASE,\ SH,\ RO,\ NP,\ XN)\ \(\backslash\)}}
\DoxyCodeLine{00090\ \textcolor{preprocessor}{\ \ ((BASE\ \&\ MPU\_RBAR\_BASE\_Msk)\ |\ \(\backslash\)}}
\DoxyCodeLine{00091\ \textcolor{preprocessor}{\ \ ((SH\ <<\ MPU\_RBAR\_SH\_Pos)\ \&\ MPU\_RBAR\_SH\_Msk)\ |\ \(\backslash\)}}
\DoxyCodeLine{00092\ \textcolor{preprocessor}{\ \ ((ARM\_MPU\_AP\_(RO,\ NP)\ <<\ MPU\_RBAR\_AP\_Pos)\ \&\ MPU\_RBAR\_AP\_Msk)\ |\ \(\backslash\)}}
\DoxyCodeLine{00093\ \textcolor{preprocessor}{\ \ ((XN\ <<\ MPU\_RBAR\_XN\_Pos)\ \&\ MPU\_RBAR\_XN\_Msk))}}
\DoxyCodeLine{00094\ }
\DoxyCodeLine{00099\ \textcolor{preprocessor}{\#define\ ARM\_MPU\_RLAR(LIMIT,\ IDX)\ \(\backslash\)}}
\DoxyCodeLine{00100\ \textcolor{preprocessor}{\ \ ((LIMIT\ \&\ MPU\_RLAR\_LIMIT\_Msk)\ |\ \(\backslash\)}}
\DoxyCodeLine{00101\ \textcolor{preprocessor}{\ \ ((IDX\ <<\ MPU\_RLAR\_AttrIndx\_Pos)\ \&\ MPU\_RLAR\_AttrIndx\_Msk)\ |\ \(\backslash\)}}
\DoxyCodeLine{00102\ \textcolor{preprocessor}{\ \ (MPU\_RLAR\_EN\_Msk))}}
\DoxyCodeLine{00103\ }
\DoxyCodeLine{00104\ \textcolor{preprocessor}{\#if\ defined(MPU\_RLAR\_PXN\_Pos)}}
\DoxyCodeLine{00105\ \ \ }
\DoxyCodeLine{00111\ \textcolor{preprocessor}{\#define\ ARM\_MPU\_RLAR\_PXN(LIMIT,\ PXN,\ IDX)\ \(\backslash\)}}
\DoxyCodeLine{00112\ \textcolor{preprocessor}{\ \ ((LIMIT\ \&\ MPU\_RLAR\_LIMIT\_Msk)\ |\ \(\backslash\)}}
\DoxyCodeLine{00113\ \textcolor{preprocessor}{\ \ ((PXN\ <<\ MPU\_RLAR\_PXN\_Pos)\ \&\ MPU\_RLAR\_PXN\_Msk)\ |\ \(\backslash\)}}
\DoxyCodeLine{00114\ \textcolor{preprocessor}{\ \ ((IDX\ <<\ MPU\_RLAR\_AttrIndx\_Pos)\ \&\ MPU\_RLAR\_AttrIndx\_Msk)\ |\ \(\backslash\)}}
\DoxyCodeLine{00115\ \textcolor{preprocessor}{\ \ (MPU\_RLAR\_EN\_Msk))}}
\DoxyCodeLine{00116\ \ \ }
\DoxyCodeLine{00117\ \textcolor{preprocessor}{\#endif}}
\DoxyCodeLine{00118\ }
\DoxyCodeLine{00122\ \textcolor{keyword}{typedef}\ \textcolor{keyword}{struct\ }\{}
\DoxyCodeLine{00123\ \ \ uint32\_t\ RBAR;\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }
\DoxyCodeLine{00124\ \ \ uint32\_t\ \mbox{\hyperlink{struct_a_r_m___m_p_u___region__t_ab5d3a650dbffd0b272bf7df5b140e8a8}{RLAR}};\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }
\DoxyCodeLine{00125\ \}\ \mbox{\hyperlink{struct_a_r_m___m_p_u___region__t}{ARM\_MPU\_Region\_t}};}
\DoxyCodeLine{00126\ \ \ \ \ }
\DoxyCodeLine{00130\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ ARM\_MPU\_Enable(uint32\_t\ MPU\_Control)}
\DoxyCodeLine{00131\ \{}
\DoxyCodeLine{00132\ \ \ \mbox{\hyperlink{group___c_m_s_i_s___c_o_r_e_gaad8182e72fe5037a6ba1eb65a1554e0b}{MPU}}-\/>CTRL\ =\ MPU\_Control\ |\ \mbox{\hyperlink{group___c_m_s_i_s___c_o_r_e_gae72b283f6e38b641c877182f03d95844}{MPU\_CTRL\_ENABLE\_Msk}};}
\DoxyCodeLine{00133\ \textcolor{preprocessor}{\#ifdef\ SCB\_SHCSR\_MEMFAULTENA\_Msk}}
\DoxyCodeLine{00134\ \ \ \mbox{\hyperlink{group___c_m_s_i_s___c_o_r_e_gaaaf6477c2bde2f00f99e3c2fd1060b01}{SCB}}-\/>SHCSR\ |=\ \mbox{\hyperlink{group___c_m_s_i_s___c_o_r_e_gaf084424fa1f69bea36a1c44899d83d17}{SCB\_SHCSR\_MEMFAULTENA\_Msk}};}
\DoxyCodeLine{00135\ \textcolor{preprocessor}{\#endif}}
\DoxyCodeLine{00136\ \ \ \mbox{\hyperlink{group___c_m_s_i_s___core___instruction_interface_ga067d257a2b34565410acefb5afef2203}{\_\_DSB}}();}
\DoxyCodeLine{00137\ \ \ \mbox{\hyperlink{group___c_m_s_i_s___core___instruction_interface_gaad233022e850a009fc6f7602be1182f6}{\_\_ISB}}();}
\DoxyCodeLine{00138\ \}}
\DoxyCodeLine{00139\ }
\DoxyCodeLine{00142\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ ARM\_MPU\_Disable(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00143\ \{}
\DoxyCodeLine{00144\ \ \ \mbox{\hyperlink{group___c_m_s_i_s___core___instruction_interface_ga671101179b5943990785f36f8c1e2269}{\_\_DMB}}();}
\DoxyCodeLine{00145\ \textcolor{preprocessor}{\#ifdef\ SCB\_SHCSR\_MEMFAULTENA\_Msk}}
\DoxyCodeLine{00146\ \ \ \mbox{\hyperlink{group___c_m_s_i_s___c_o_r_e_gaaaf6477c2bde2f00f99e3c2fd1060b01}{SCB}}-\/>SHCSR\ \&=\ \mbox{\hyperlink{group___c_m_s_i_s___c_o_r_e_gaf084424fa1f69bea36a1c44899d83d17}{\string~SCB\_SHCSR\_MEMFAULTENA\_Msk}};}
\DoxyCodeLine{00147\ \textcolor{preprocessor}{\#endif}}
\DoxyCodeLine{00148\ \ \ \mbox{\hyperlink{group___c_m_s_i_s___c_o_r_e_gaad8182e72fe5037a6ba1eb65a1554e0b}{MPU}}-\/>CTRL\ \ \&=\ \mbox{\hyperlink{group___c_m_s_i_s___c_o_r_e_gae72b283f6e38b641c877182f03d95844}{\string~MPU\_CTRL\_ENABLE\_Msk}};}
\DoxyCodeLine{00149\ \}}
\DoxyCodeLine{00150\ }
\DoxyCodeLine{00151\ \textcolor{preprocessor}{\#ifdef\ MPU\_NS}\textcolor{preprocessor}{}}
\DoxyCodeLine{00155\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ ARM\_MPU\_Enable\_NS(uint32\_t\ MPU\_Control)}
\DoxyCodeLine{00156\ \{}
\DoxyCodeLine{00157\ \ \ MPU\_NS-\/>CTRL\ =\ MPU\_Control\ |\ \mbox{\hyperlink{group___c_m_s_i_s___c_o_r_e_gae72b283f6e38b641c877182f03d95844}{MPU\_CTRL\_ENABLE\_Msk}};}
\DoxyCodeLine{00158\ \textcolor{preprocessor}{\#ifdef\ SCB\_SHCSR\_MEMFAULTENA\_Msk}}
\DoxyCodeLine{00159\ \ \ SCB\_NS-\/>SHCSR\ |=\ \mbox{\hyperlink{group___c_m_s_i_s___c_o_r_e_gaf084424fa1f69bea36a1c44899d83d17}{SCB\_SHCSR\_MEMFAULTENA\_Msk}};}
\DoxyCodeLine{00160\ \textcolor{preprocessor}{\#endif}}
\DoxyCodeLine{00161\ \ \ \mbox{\hyperlink{group___c_m_s_i_s___core___instruction_interface_ga067d257a2b34565410acefb5afef2203}{\_\_DSB}}();}
\DoxyCodeLine{00162\ \ \ \mbox{\hyperlink{group___c_m_s_i_s___core___instruction_interface_gaad233022e850a009fc6f7602be1182f6}{\_\_ISB}}();}
\DoxyCodeLine{00163\ \}}
\DoxyCodeLine{00164\ }
\DoxyCodeLine{00167\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ ARM\_MPU\_Disable\_NS(\textcolor{keywordtype}{void})}
\DoxyCodeLine{00168\ \{}
\DoxyCodeLine{00169\ \ \ \mbox{\hyperlink{group___c_m_s_i_s___core___instruction_interface_ga671101179b5943990785f36f8c1e2269}{\_\_DMB}}();}
\DoxyCodeLine{00170\ \textcolor{preprocessor}{\#ifdef\ SCB\_SHCSR\_MEMFAULTENA\_Msk}}
\DoxyCodeLine{00171\ \ \ SCB\_NS-\/>SHCSR\ \&=\ \mbox{\hyperlink{group___c_m_s_i_s___c_o_r_e_gaf084424fa1f69bea36a1c44899d83d17}{\string~SCB\_SHCSR\_MEMFAULTENA\_Msk}};}
\DoxyCodeLine{00172\ \textcolor{preprocessor}{\#endif}}
\DoxyCodeLine{00173\ \ \ MPU\_NS-\/>CTRL\ \ \&=\ \mbox{\hyperlink{group___c_m_s_i_s___c_o_r_e_gae72b283f6e38b641c877182f03d95844}{\string~MPU\_CTRL\_ENABLE\_Msk}};}
\DoxyCodeLine{00174\ \}}
\DoxyCodeLine{00175\ \textcolor{preprocessor}{\#endif}}
\DoxyCodeLine{00176\ }
\DoxyCodeLine{00182\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ ARM\_MPU\_SetMemAttrEx(\mbox{\hyperlink{struct_m_p_u___type}{MPU\_Type}}*\ mpu,\ uint8\_t\ idx,\ uint8\_t\ attr)}
\DoxyCodeLine{00183\ \{}
\DoxyCodeLine{00184\ \ \ \textcolor{keyword}{const}\ uint8\_t\ reg\ =\ idx\ /\ 4U;}
\DoxyCodeLine{00185\ \ \ \textcolor{keyword}{const}\ uint32\_t\ pos\ =\ ((idx\ \%\ 4U)\ *\ 8U);}
\DoxyCodeLine{00186\ \ \ \textcolor{keyword}{const}\ uint32\_t\ mask\ =\ 0xFFU\ <<\ pos;}
\DoxyCodeLine{00187\ \ \ }
\DoxyCodeLine{00188\ \ \ \textcolor{keywordflow}{if}\ (reg\ >=\ (\textcolor{keyword}{sizeof}(mpu-\/>MAIR)\ /\ \textcolor{keyword}{sizeof}(mpu-\/>MAIR[0])))\ \{}
\DoxyCodeLine{00189\ \ \ \ \ \textcolor{keywordflow}{return};\ \textcolor{comment}{//\ invalid\ index}}
\DoxyCodeLine{00190\ \ \ \}}
\DoxyCodeLine{00191\ \ \ }
\DoxyCodeLine{00192\ \ \ mpu-\/>MAIR[reg]\ =\ ((mpu-\/>MAIR[reg]\ \&\ \string~mask)\ |\ ((attr\ <<\ pos)\ \&\ mask));}
\DoxyCodeLine{00193\ \}}
\DoxyCodeLine{00194\ }
\DoxyCodeLine{00199\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ ARM\_MPU\_SetMemAttr(uint8\_t\ idx,\ uint8\_t\ attr)}
\DoxyCodeLine{00200\ \{}
\DoxyCodeLine{00201\ \ \ ARM\_MPU\_SetMemAttrEx(\mbox{\hyperlink{group___c_m_s_i_s___c_o_r_e_gaad8182e72fe5037a6ba1eb65a1554e0b}{MPU}},\ idx,\ attr);}
\DoxyCodeLine{00202\ \}}
\DoxyCodeLine{00203\ }
\DoxyCodeLine{00204\ \textcolor{preprocessor}{\#ifdef\ MPU\_NS}\textcolor{preprocessor}{}}
\DoxyCodeLine{00209\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ ARM\_MPU\_SetMemAttr\_NS(uint8\_t\ idx,\ uint8\_t\ attr)}
\DoxyCodeLine{00210\ \{}
\DoxyCodeLine{00211\ \ \ ARM\_MPU\_SetMemAttrEx(MPU\_NS,\ idx,\ attr);}
\DoxyCodeLine{00212\ \}}
\DoxyCodeLine{00213\ \textcolor{preprocessor}{\#endif}}
\DoxyCodeLine{00214\ }
\DoxyCodeLine{00219\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ ARM\_MPU\_ClrRegionEx(\mbox{\hyperlink{struct_m_p_u___type}{MPU\_Type}}*\ mpu,\ uint32\_t\ rnr)}
\DoxyCodeLine{00220\ \{}
\DoxyCodeLine{00221\ \ \ mpu-\/>\mbox{\hyperlink{group___c_m_s_i_s__core___debug_functions_gaa800d44f4d3520cc891d7b8d711320c1}{RNR}}\ =\ rnr;}
\DoxyCodeLine{00222\ \ \ mpu-\/>\mbox{\hyperlink{group___c_m_s_i_s__core___debug_functions_ga3e1c3c971bab068b1d4c689db3221b40}{RLAR}}\ =\ 0U;}
\DoxyCodeLine{00223\ \}}
\DoxyCodeLine{00224\ }
\DoxyCodeLine{00228\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ ARM\_MPU\_ClrRegion(uint32\_t\ rnr)}
\DoxyCodeLine{00229\ \{}
\DoxyCodeLine{00230\ \ \ ARM\_MPU\_ClrRegionEx(\mbox{\hyperlink{group___c_m_s_i_s___c_o_r_e_gaad8182e72fe5037a6ba1eb65a1554e0b}{MPU}},\ rnr);}
\DoxyCodeLine{00231\ \}}
\DoxyCodeLine{00232\ }
\DoxyCodeLine{00233\ \textcolor{preprocessor}{\#ifdef\ MPU\_NS}\textcolor{preprocessor}{}}
\DoxyCodeLine{00237\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ ARM\_MPU\_ClrRegion\_NS(uint32\_t\ rnr)}
\DoxyCodeLine{00238\ \{\ \ }
\DoxyCodeLine{00239\ \ \ ARM\_MPU\_ClrRegionEx(MPU\_NS,\ rnr);}
\DoxyCodeLine{00240\ \}}
\DoxyCodeLine{00241\ \textcolor{preprocessor}{\#endif}}
\DoxyCodeLine{00242\ \ \ \ }
\DoxyCodeLine{00249\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ ARM\_MPU\_SetRegionEx(\mbox{\hyperlink{struct_m_p_u___type}{MPU\_Type}}*\ mpu,\ uint32\_t\ rnr,\ uint32\_t\ rbar,\ uint32\_t\ rlar)}
\DoxyCodeLine{00250\ \{}
\DoxyCodeLine{00251\ \ \ mpu-\/>\mbox{\hyperlink{group___c_m_s_i_s__core___debug_functions_gaa800d44f4d3520cc891d7b8d711320c1}{RNR}}\ =\ rnr;}
\DoxyCodeLine{00252\ \ \ mpu-\/>\mbox{\hyperlink{group___c_m_s_i_s__core___debug_functions_gac953770d38a7d322b971d93eb8a5b062}{RBAR}}\ =\ rbar;}
\DoxyCodeLine{00253\ \ \ mpu-\/>\mbox{\hyperlink{group___c_m_s_i_s__core___debug_functions_ga3e1c3c971bab068b1d4c689db3221b40}{RLAR}}\ =\ rlar;}
\DoxyCodeLine{00254\ \}}
\DoxyCodeLine{00255\ \ \ \ }
\DoxyCodeLine{00261\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ ARM\_MPU\_SetRegion(uint32\_t\ rnr,\ uint32\_t\ rbar,\ uint32\_t\ rlar)}
\DoxyCodeLine{00262\ \{}
\DoxyCodeLine{00263\ \ \ ARM\_MPU\_SetRegionEx(\mbox{\hyperlink{group___c_m_s_i_s___c_o_r_e_gaad8182e72fe5037a6ba1eb65a1554e0b}{MPU}},\ rnr,\ rbar,\ rlar);}
\DoxyCodeLine{00264\ \}}
\DoxyCodeLine{00265\ }
\DoxyCodeLine{00266\ \textcolor{preprocessor}{\#ifdef\ MPU\_NS}\textcolor{preprocessor}{\ \ \ }}
\DoxyCodeLine{00272\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ ARM\_MPU\_SetRegion\_NS(uint32\_t\ rnr,\ uint32\_t\ rbar,\ uint32\_t\ rlar)}
\DoxyCodeLine{00273\ \{}
\DoxyCodeLine{00274\ \ \ ARM\_MPU\_SetRegionEx(MPU\_NS,\ rnr,\ rbar,\ rlar);\ \ }
\DoxyCodeLine{00275\ \}}
\DoxyCodeLine{00276\ \textcolor{preprocessor}{\#endif}}
\DoxyCodeLine{00277\ }
\DoxyCodeLine{00283\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ ARM\_MPU\_OrderedMemcpy(\textcolor{keyword}{volatile}\ uint32\_t*\ dst,\ \textcolor{keyword}{const}\ uint32\_t*\ \_\_RESTRICT\ src,\ uint32\_t\ len)}
\DoxyCodeLine{00284\ \{}
\DoxyCodeLine{00285\ \ \ uint32\_t\ i;}
\DoxyCodeLine{00286\ \ \ \textcolor{keywordflow}{for}\ (i\ =\ 0U;\ i\ <\ len;\ ++i)\ }
\DoxyCodeLine{00287\ \ \ \{}
\DoxyCodeLine{00288\ \ \ \ \ dst[i]\ =\ src[i];}
\DoxyCodeLine{00289\ \ \ \}}
\DoxyCodeLine{00290\ \}}
\DoxyCodeLine{00291\ }
\DoxyCodeLine{00298\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ ARM\_MPU\_LoadEx(\mbox{\hyperlink{struct_m_p_u___type}{MPU\_Type}}*\ mpu,\ uint32\_t\ rnr,\ \mbox{\hyperlink{struct_a_r_m___m_p_u___region__t}{ARM\_MPU\_Region\_t}}\ \textcolor{keyword}{const}*\ table,\ uint32\_t\ cnt)\ }
\DoxyCodeLine{00299\ \{}
\DoxyCodeLine{00300\ \ \ \textcolor{keyword}{const}\ uint32\_t\ rowWordSize\ =\ \textcolor{keyword}{sizeof}(\mbox{\hyperlink{struct_a_r_m___m_p_u___region__t}{ARM\_MPU\_Region\_t}})/4U;}
\DoxyCodeLine{00301\ \ \ \textcolor{keywordflow}{if}\ (cnt\ ==\ 1U)\ \{}
\DoxyCodeLine{00302\ \ \ \ \ mpu-\/>\mbox{\hyperlink{group___c_m_s_i_s__core___debug_functions_gaa800d44f4d3520cc891d7b8d711320c1}{RNR}}\ =\ rnr;}
\DoxyCodeLine{00303\ \ \ \ \ ARM\_MPU\_OrderedMemcpy(\&(mpu-\/>\mbox{\hyperlink{group___c_m_s_i_s__core___debug_functions_gac953770d38a7d322b971d93eb8a5b062}{RBAR}}),\ \&(table-\/>\mbox{\hyperlink{struct_a_r_m___m_p_u___region__t_afe7a7721aa08988d915670efa432cdd2}{RBAR}}),\ rowWordSize);}
\DoxyCodeLine{00304\ \ \ \}\ \textcolor{keywordflow}{else}\ \{}
\DoxyCodeLine{00305\ \ \ \ \ uint32\_t\ rnrBase\ \ \ =\ rnr\ \&\ \string~(MPU\_TYPE\_RALIASES-\/1U);}
\DoxyCodeLine{00306\ \ \ \ \ uint32\_t\ rnrOffset\ =\ rnr\ \%\ MPU\_TYPE\_RALIASES;}
\DoxyCodeLine{00307\ \ \ \ \ }
\DoxyCodeLine{00308\ \ \ \ \ mpu-\/>\mbox{\hyperlink{group___c_m_s_i_s__core___debug_functions_gaa800d44f4d3520cc891d7b8d711320c1}{RNR}}\ =\ rnrBase;}
\DoxyCodeLine{00309\ \ \ \ \ \textcolor{keywordflow}{while}\ ((rnrOffset\ +\ cnt)\ >\ MPU\_TYPE\_RALIASES)\ \{}
\DoxyCodeLine{00310\ \ \ \ \ \ \ uint32\_t\ c\ =\ MPU\_TYPE\_RALIASES\ -\/\ rnrOffset;}
\DoxyCodeLine{00311\ \ \ \ \ \ \ ARM\_MPU\_OrderedMemcpy(\&(mpu-\/>\mbox{\hyperlink{group___c_m_s_i_s__core___debug_functions_gac953770d38a7d322b971d93eb8a5b062}{RBAR}})+(rnrOffset*2U),\ \&(table-\/>\mbox{\hyperlink{struct_a_r_m___m_p_u___region__t_afe7a7721aa08988d915670efa432cdd2}{RBAR}}),\ c*rowWordSize);}
\DoxyCodeLine{00312\ \ \ \ \ \ \ table\ +=\ c;}
\DoxyCodeLine{00313\ \ \ \ \ \ \ cnt\ -\/=\ c;}
\DoxyCodeLine{00314\ \ \ \ \ \ \ rnrOffset\ =\ 0U;}
\DoxyCodeLine{00315\ \ \ \ \ \ \ rnrBase\ +=\ MPU\_TYPE\_RALIASES;}
\DoxyCodeLine{00316\ \ \ \ \ \ \ mpu-\/>\mbox{\hyperlink{group___c_m_s_i_s__core___debug_functions_gaa800d44f4d3520cc891d7b8d711320c1}{RNR}}\ =\ rnrBase;}
\DoxyCodeLine{00317\ \ \ \ \ \}}
\DoxyCodeLine{00318\ \ \ \ \ }
\DoxyCodeLine{00319\ \ \ \ \ ARM\_MPU\_OrderedMemcpy(\&(mpu-\/>\mbox{\hyperlink{group___c_m_s_i_s__core___debug_functions_gac953770d38a7d322b971d93eb8a5b062}{RBAR}})+(rnrOffset*2U),\ \&(table-\/>\mbox{\hyperlink{struct_a_r_m___m_p_u___region__t_afe7a7721aa08988d915670efa432cdd2}{RBAR}}),\ cnt*rowWordSize);}
\DoxyCodeLine{00320\ \ \ \}}
\DoxyCodeLine{00321\ \}}
\DoxyCodeLine{00322\ }
\DoxyCodeLine{00328\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ ARM\_MPU\_Load(uint32\_t\ rnr,\ \mbox{\hyperlink{struct_a_r_m___m_p_u___region__t}{ARM\_MPU\_Region\_t}}\ \textcolor{keyword}{const}*\ table,\ uint32\_t\ cnt)\ }
\DoxyCodeLine{00329\ \{}
\DoxyCodeLine{00330\ \ \ ARM\_MPU\_LoadEx(\mbox{\hyperlink{group___c_m_s_i_s___c_o_r_e_gaad8182e72fe5037a6ba1eb65a1554e0b}{MPU}},\ rnr,\ table,\ cnt);}
\DoxyCodeLine{00331\ \}}
\DoxyCodeLine{00332\ }
\DoxyCodeLine{00333\ \textcolor{preprocessor}{\#ifdef\ MPU\_NS}\textcolor{preprocessor}{}}
\DoxyCodeLine{00339\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ ARM\_MPU\_Load\_NS(uint32\_t\ rnr,\ \mbox{\hyperlink{struct_a_r_m___m_p_u___region__t}{ARM\_MPU\_Region\_t}}\ \textcolor{keyword}{const}*\ table,\ uint32\_t\ cnt)\ }
\DoxyCodeLine{00340\ \{}
\DoxyCodeLine{00341\ \ \ ARM\_MPU\_LoadEx(MPU\_NS,\ rnr,\ table,\ cnt);}
\DoxyCodeLine{00342\ \}}
\DoxyCodeLine{00343\ \textcolor{preprocessor}{\#endif}}
\DoxyCodeLine{00344\ }
\DoxyCodeLine{00345\ \textcolor{preprocessor}{\#endif}}
\DoxyCodeLine{00346\ }

\end{DoxyCode}
